A NAND nonvolatile semiconductor memory device is proposed that includes a plurality of memory cells connected in series in the stacking direction of a stacked body by a configuration in which a first insulating film, a charge storage layer, a second insulating film, and a channel layer are formed in a memory hole penetrating through the stacked body in which conductive layers and interlayer insulating films are alternately stacked. The nonvolatile semiconductor memory device includes memory cells three-dimensionally, and is therefore expected to enable increasing the bit density and reducing production costs. In the nonvolatile semiconductor memory device, the memory cell is a transistor composed of the conductive layer of the stacked body and the first insulating film, the charge storage layer, the second insulating film, and the channel layer in the memory hole. The conductive layer of the stacked body functions as a control gate. Electrons can be injected from the channel layer into the charge storage layer by increasing the voltage of the control gate. When electrons exist in the charge storage layer, the threshold of the memory cell is increased. The threshold of the memory cell is changed by the presence or absence of electrons in the charge storage layer. Utilizing this, the memory cell functions as one memory of the semiconductor memory device. The charge storage layer is formed of a material that traps electrons, such as silicon nitride. Although memory cells adjacent in the stacking direction of the stacked body are connected to each other by the charge storage layer, electrons are trapped in a portion of the charge storage layer opposed to the conductive layer of each memory cell. Thus, electrons are retained in units of a memory cell. The nonvolatile semiconductor memory device in which a charge is thus retained in the charge storage layer in units of a memory cell to perform memory storage operation is a charge storage nonvolatile semiconductor memory device. In the charge storage nonvolatile semiconductor memory device, electrons trapped in the charge storage layer in each memory cell may leak through the charge storage layer into an adjacent memory cell, and the threshold of the memory cell varies. That is, the charge retention properties of the memory cell are not good. Furthermore, when erasing the record of the memory cell, holes are injected from the channel layer into the charge storage layer by being made to tunnel through the second insulating film. Therefore, the deterioration of the second insulating film is accelerated. This further accelerates the degradation of the charge retention ability of the memory cell. Furthermore, since the density of electrons stored in the charge storage layer cannot be increased, the range of the threshold of the memory cell is narrow. Therefore, it is difficult to enable multiple-valued operation of the memory cell.
In contrast, a floating gate nonvolatile semiconductor memory device includes a floating electrode formed of a conductive layer of conductive silicon or the like in place of the charge storage layer mentioned above. The floating electrode is insulated from an adjacent memory cell by an interlayer insulating film. The memory cell of the floating gate nonvolatile semiconductor memory device (hereinafter, a “floating gate-type memory cell”) is, similarly to the memory cell of the charge storage nonvolatile semiconductor memory device (hereinafter, a “charge storage-type memory cell”), composed of a first conductive layer, a first insulating film, a second conductive layer, a second insulating film, and a channel layer. Here, the first conductive layer functions as a control gate. The second conductive layer functions as a floating electrode (a floating gate). The floating electrode is, unlike the case of the charge storage-type memory cell, insulated from the floating electrode of an adjacent memory cell by an interlayer insulating film. In the floating gate nonvolatile semiconductor memory device, similarly to the charge storage nonvolatile semiconductor memory device, electrons are stored in the floating electrode of the memory cell to change the threshold of the memory cell, and this is used for memory storage operation. In the floating gate nonvolatile semiconductor memory device, since the floating electrode is a conductor, the electron density can be increased. Therefore, the range of the threshold of the memory cell is wide, and this is preferable for enabling multiple-valued operation of the memory cell. Furthermore, the floating electrode is insulated from the floating electrode of an adjacent memory cell by the interlayer insulating film. Therefore, the leakage of electrons from the floating electrode is suppressed, and the charge retention ability of the floating gate-type memory cell is high as compared to the charge retention ability of the charge storage-type memory cell. Furthermore, in the erasing of the record of the memory cell, electrons are released from the floating electrode to the channel layer by being made to tunnel through the second insulating film. Therefore, the deterioration of the second insulating film can be suppressed as compared to the case where holes are made to tunnel. Thereby, the leakage of electrons from the floating electrode via the second insulating film is further suppressed. Thus, the charge retention ability of the floating gate-type memory cell is further improved as compared to that of the charge storage-type memory cell.
As described above, the floating gate-type memory cell has higher charge retention ability and is more suitable for enabling multiple-valued operation than the charge storage-type memory cell. Therefore, it is desired for floating gate-type memory cells to be formed along a memory hole penetrating through a stacked body in which conductive layers and interlayer insulating films are alternately stacked. However, in the case of manufacturing a nonvolatile semiconductor memory device that includes a floating electrode in a portion opposed to each conductive layer of a memory hole penetrating through the stacked body mentioned above and includes an interlayer insulating film between floating electrodes adjacent in the stacking direction, the manufacturing processes have been complicated and the manufacturing costs have been high. Furthermore, it is necessary to form a back gate transistor in order that adjacent columnar bodies in which a plurality of memory cells are connected may be connected on the substrate side. Thus, the structure is complicated and also this has been a factor in increasing manufacturing costs. A nonvolatile semiconductor memory device is desired that includes a plurality of floating gate-type memory cells formed along a memory hole penetrating through a stacked body in which conductive layers and interlayer insulating films are alternately stacked, can be manufactured by easy manufacturing processes, and has a high bit density and high charge retention ability.